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{{mergeto|Model checking|date=January 2011}}
{{essay|date=January 2011}}
In finite-state [[Intelligent verification|verification]], [[Model checking|model checkers]] examine [[finite-state machine]]s representing concurrent [[software]] systems looking for errors in [[design]].  Errors are defined as violations of requirements expressed as properties of the system. In the event that the finite-state machine fails to satisfy the property, a model checker is in some cases capable of producing a counterexample &ndash; an execution of the system demonstrating how the error occurs.
 
Property [[specification]]s are often written as [[Linear temporal logic|Linear Temporal Logic]] (LTL) expressions. Once a [[Requirements|requirement]] is expressed as an LTL [[formula]], a model checker can automatically verify this property against the model.
 
==Example==
One example of such a system requirement: 
''Between the time an elevator is called at a floor and the time it opens its doors at that floor, the elevator can arrive at that floor at most twice''.<ref>M. Dwyer, G. Avruin, J. Corbett, Y. Hu, "Patterns in Property Specification for Finite-State Verification." In M. Ardis, editor, ''Proceedings of the Second Workshop on Formal Methods in Software Practice'', pages 7–15, March 1998.</ref>  The authors of "Patterns in Property Specification for Finite-State Verification" translate this requirement into the following LTL formula:
 
:<math>\begin{align}\Box((call \lor \Diamond open) \to
& ((\lnot atfloor \lor \lnot open) ~\mathcal{U}  \\
& (open \lor ((atfloor \land \lnot open) ~\mathcal{U}\\
& (open \lor ((\lnot atfloor \land \lnot open) ~\mathcal{U} \\
& (open \lor ((atfloor \land \lnot open) ~\mathcal{U} \\
& (open \lor (\lnot atfloor ~\mathcal{U}~ open)))))))))))\end{align}</math>
 
<!-- [[Image:ElevatorLTL.JPG|none|center]] -->
 
== See also ==
*[[Finite-state machine]]s
*[[Formal methods]]
*[[Formal verification]]
*[[Kripke structure]]
*[[Linear temporal logic]]
*[[Model checking]]
*[[Temporal logic]]
 
== References ==
{{reflist}}
 
== Bibliography ==
# Z. Manna and [[Amir Pnueli]], ''The Temporal Logic of Reactive and Concurrent Systems: Specification'', [[Springer Science+Business Media|Springer-Verlag]], New York, 1991.
# [[Amir Pnueli]], The Temporal Logic of Programs. In ''Proceedings of the 18th IEEE Symposium on Foundations of Computer Science (FOCS 1977)'', pages 46–57, 1977.
 
[[Category:Temporal logic|Finite State Verification]]
[[Category:Model checking]]
[[Category:Automata theory]]

Revision as of 22:14, 17 November 2013

Template:Mergeto Template:Essay In finite-state verification, model checkers examine finite-state machines representing concurrent software systems looking for errors in design. Errors are defined as violations of requirements expressed as properties of the system. In the event that the finite-state machine fails to satisfy the property, a model checker is in some cases capable of producing a counterexample – an execution of the system demonstrating how the error occurs.

Property specifications are often written as Linear Temporal Logic (LTL) expressions. Once a requirement is expressed as an LTL formula, a model checker can automatically verify this property against the model.

Example

One example of such a system requirement: Between the time an elevator is called at a floor and the time it opens its doors at that floor, the elevator can arrive at that floor at most twice.[1] The authors of "Patterns in Property Specification for Finite-State Verification" translate this requirement into the following LTL formula:


See also

References

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Bibliography

  1. Z. Manna and Amir Pnueli, The Temporal Logic of Reactive and Concurrent Systems: Specification, Springer-Verlag, New York, 1991.
  2. Amir Pnueli, The Temporal Logic of Programs. In Proceedings of the 18th IEEE Symposium on Foundations of Computer Science (FOCS 1977), pages 46–57, 1977.
  1. M. Dwyer, G. Avruin, J. Corbett, Y. Hu, "Patterns in Property Specification for Finite-State Verification." In M. Ardis, editor, Proceedings of the Second Workshop on Formal Methods in Software Practice, pages 7–15, March 1998.