|
|
| Line 1: |
Line 1: |
| {| class="wikitable" align=right
| | Greetings! I am Myrtle Shroyer. California is where I've usually been living and I adore each working day living here. To collect cash is one of the issues I adore most. Since she was eighteen she's been working as a receptionist but her promotion never arrives.<br><br>my web blog - [http://www.dicas-saudenatural.com/members/shastsalcido/activity/89589/ over the counter std test] |
| |- bgcolor="#ddeeff" align="center"
| |
| |colspan=2|'''INPUT''' || '''OUTPUT'''
| |
| |- bgcolor="#ddeeff" align="center"
| |
| | A || B || A AND B
| |
| |- bgcolor="#ddffdd" align="center"
| |
| |0 || 0 || 0
| |
| |- bgcolor="#ddffdd" align="center"
| |
| |0 || 1 || 0
| |
| |- bgcolor="#ddffdd" align="center"
| |
| |1 || 0 || 0
| |
| |- bgcolor="#ddffdd" align="center"
| |
| |1 || 1 || 1
| |
| |}
| |
| The '''AND gate''' is a basic digital [[logic gate]] that implements [[logical conjunction]] - it behaves according to the [[truth table]] to the right. A HIGH output (1) results only if both the inputs to the AND gate are HIGH (1). If neither or only one input to the AND gate is HIGH, a LOW output results. In another sense, the function of AND effectively finds the ''minimum'' between two binary digits, just as the [[OR gate|OR]] function finds the ''maximum''. Therefore, the output is always 0 except when all the inputs are 1s.
| |
| | |
| ==Symbols==
| |
| | |
| There are three symbols for AND gates: the American ([[ANSI]] or 'military') symbol and the [[International Electrotechnical Commission|IEC]] ('European' or 'rectangular') symbol, as well as the deprecated [[DIN]] symbol. For more information see [[Logic gate#Symbols|Logic Gate Symbols]].
| |
|
| |
| | |
| {| align=center style="text-align:center"
| |
| |[[Image:AND ANSI.svg]]
| |
| |[[Image:AND IEC.svg]]
| |
| |[[image:AND DIN.svg]]
| |
| |-
| |
| |''MIL/ANSI Symbol''
| |
| |''IEC Symbol''
| |
| |''DIN Symbol''
| |
| |}
| |
| | |
| The AND gate with inputs ''A'' and ''B'' and output ''C'' implements the logical expression <math>C = A \cdot B</math>.
| |
| | |
| ==Implementations==
| |
| {|
| |
| | [[Image:NMOS AND gate.png|thumb|NMOS AND gate]] || [[Image:AND gate diode.svg|thumb|AND gate using diodes]]
| |
| |}
| |
| An AND gate is usually designed using N-channel (pictured) or P-channel [[MOSFET]]s. The digital inputs '''a''' and '''b''' cause the output '''F''' to have the same result as the AND function.
| |
| | |
| === Alternatives ===
| |
| If no specific AND gates are available, one can be made from [[NAND Gate|NAND]] or [[NOR Gate|NOR]] gates, because NAND and NOR gates are considered the "universal gates," <ref>
| |
| Mano, M. Morris and Charles R. Kime. ''Logic and Computer Design Fundamentals, Third Edition.'' Prentice Hall, 2004. p. 73.</ref> meaning that they can be used to make all the others. XOR Gates can also be used to simulate AND functions, but are rarely used to do so.
| |
| | |
| {| align=center style="text-align:center"
| |
| ! width="150" |Desired gate!! width="150" |NAND construction!! width="150" |NOR construction
| |
| |-
| |
| |[[Image:AND ANSI Labelled.svg]]||[[Image:AND from NAND.svg]]||[[File:AND using NOR.svg]]
| |
| |-
| |
| | |
| |}
| |
| | |
| == See also ==
| |
| {{commons category|AND gates}}
| |
| | |
| *[[OR gate]]
| |
| *[[NOT gate]]
| |
| *[[NAND gate]]
| |
| *[[NOR gate]]
| |
| *[[XOR gate]]
| |
| *[[XNOR gate]]
| |
| *[[Boolean algebra (logic)]]
| |
| *[[Logic gates]]
| |
| | |
| {{Logical connectives}}
| |
| | |
| == References ==
| |
| <div references-small>
| |
| <references />
| |
| </div>
| |
| | |
| [[Category:Logic gates]]
| |
Greetings! I am Myrtle Shroyer. California is where I've usually been living and I adore each working day living here. To collect cash is one of the issues I adore most. Since she was eighteen she's been working as a receptionist but her promotion never arrives.
my web blog - over the counter std test