Vector spherical harmonics

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Dual impedance and dual network are terms used in electronic network analysis. The dual of an impedance Z is its algebraic inverse Z=1Z. Note that Z and Z are the duals of each other, that is, they are reciprocal. For this reason the dual impedance is also called the inverse impedance. The dual of a network of impedances is that network whose impedance is Z. In the case of a network with more than one port the impedance looking into each of the ports must simultaneously be dual.

Another way of stating this is that the dual of Z is the admittance Y=Z.

This is consistent with the definition of dual as being that circuit whose voltages and currents are interchanged since Z=VI and Z=1Z=IV[1]

Template:Complex Z

Scaled and normalised duals

In a real design situation it is usually desired to find the dual of an impedance with respect to some nominal or characteristic impedance. To do this, Z and Z' are scaled to the nominal impedance Z0 so that;

ZZ0=Z0Z

Z0 is usually taken to be a purely real number R0, so Z' is only changed by a real factor of R02. In other words, the dual remains qualitatively the same circuit but all the component values must be scaled quantitively by R02.[2] The scaling factor R02. has the dimensions of Ω2. From this it follows that the constant 1 in the unscaled expression also needs to be assigned the dimensions Ω2 in any dimensional analysis.

Duals of basic circuit elements

[3]
Element Z Dual Z'
File:Dual Z 1.PNG
Resistor R
R
File:Dual Z 2.PNG
Conductor G = R
1R
File:Dual Z 2.PNG
Conductor G
1G
File:Dual Z 1.PNG
Resistor R = G
G
File:Dual Z 3.PNG
Inductor L
iωL
File:Dual Z 4.PNG
Capacitor C = L
1iωL
File:Dual Z 4.PNG
Capacitor C
1iωC
File:Dual Z 3.PNG
Inductor L = C
iωC
File:Dual Z 5.PNG
Series impedances Z = Z1 + Z2
Z1+Z2
File:Dual Z 6.PNG
Parallel admittances Y = Z1 + Z2
1Z1+Z2
File:Dual Z 6.PNG
Parallel impedances 1/Z = 1/Z1 + 1/Z2
Z=Z1Z2Z1+Z2
File:Dual Z 5.PNG
Series admittances 1/Y = 1/Z1 + 1/Z2
1Z1+1Z2
File:Dual Z 7.PNG
Voltage generator V
File:Dual Z 8.PNG
Current generator I = V
File:Dual Z 8.PNG
Current generator I
File:Dual Z 7.PNG
Voltage generator V = I

Graphical method

There is a graphical method of obtaining the dual of a network which is often easier to use than the mathematical expression for the impedance. Starting with a circuit diagram of the network in question, Z, the following steps are drawn on the diagram to produce Z' superimposed on top of Z. Typically, Z' will be drawn in a different colour to help distinguish it from the original, or, if using CAD, Z' can be drawn on a different layer.

  1. A generator is connected to each port of the original network. The purpose of this step is to prevent the ports from being "lost" in the inversion process. This happens because a port left open circuit will transform into a short circuit and disappear.
  2. A dot is drawn at the centre of each mesh of the network Z. These dots will become the circuit nodes of Z'.
  3. A conductor is drawn which entirely encloses the network Z. This conductor also becomes a node of Z'.
  4. For each circuit element of Z, its dual is drawn between the nodes in the centre of the meshes either side of Z. Where Z is on the edge of the network, one of these nodes will be the enclosing conductor from the previous step.[4]

This completes the drawing of Z'. This method also serves to demonstrate that the dual of a mesh transforms into a node and the dual of a node transforms into a mesh. Two useful examples are given below, both to illustrate the process and to give some further examples of dual networks.

Example - star network

File:Graphic method 1.svg
A star network of inductors, such as might be found on a three-phase transformer
File:Graphic method 2.svg
Attaching generators to the three ports
File:Graphic method 3.svg
Nodes of the dual network
File:Graphic method 4.svg
Components of the dual network
File:Graphic method 5.svg
The dual network with the original removed and slightly redrawn to make the topology clearer
File:Graphic method 6.svg
The dual network with the notional generators removed

It is now clear that the dual of a star network of inductors is a delta network of capacitors. This dual circuit is not the same thing as a star-delta (Y-Δ) transformation. A Y-Δ transform results in an equivalent circuit, not a dual circuit.

Example - Cauer network

Filters designed using Cauer's topology of the first form are low-pass filters consisting of a ladder network of series inductors and shunt capacitors.

File:Graphic method 7.svg
A low-pass filter implemented in Cauer topology
File:Graphic method 8.svg
Attaching generators to the input and output ports
File:Graphic method 9.svg
Nodes of the dual network
File:Graphic method 10.svg
Components of the dual network
File:Graphic method 11.svg
The dual network with the original removed and slightly redrawn to make the topology clearer


It can now be seen that the dual of a Cauer low-pass filter is still a Cauer low-pass filter. It does not transform into a high-pass filter as might have been expected. Note, however, that the first element is now a shunt component instead of a series component.

See also

References

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Bibliography

  • Redifon Radio Diary, 1970, pp. 45–48, William Collins Sons & Co, 1969.
  • Ghosh, Smarajit, Network Theory: Analysis and Synthesis, Prentice Hall of India
  • Guillemin, Ernst A., Introductory Circuit Theory, New York: John Wiley & Sons, 1953 Template:OCLC
  • Suresh, Kumar K. S., "Introduction to network topology" chapter 11 in Electric Circuits And Networks, Pearson Education India, 2010 ISBN 81-317-5511-8.
  1. Ghosh, pp.50-51
  2. Redifon, p.44
  3. Guillemin, pp.535-539
  4. Guillemin, pp.49-52
    Suresh, pp.516-517