Actuarial polynomials

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The operational amplifier integrator is an electronic integration circuit. Based around the operational amplifier (op-amp), it performs the mathematical operation of integration with respect to time; that is, its output voltage is proportional to the input voltage integrated over time.

Ideal circuit

Intuitively, the circuit operates by passing a current that charges or discharges the capacitor over time. If the op-amp is assumed ideal, nodes v₁ and v₂ are held equal, and so v₂ is a virtual ground. The input voltage passes a current ${\frac {v_{in}}{R_{1}}}$ through the resistor and series capacitor, which charges or discharges the capacitor over time. Because the resistor and capacitor are connected to a virtual ground, the input current does not vary with capacitor charge and a linear integration operation is achieved.

The circuit can be analyzed by applying Kirchhoff's current law at the node v₂, keeping ideal op-amp behaviour in mind.

$i_{\text{1}}=I_{\text{B}}+i_{\text{F}}$

$I_{\text{B}}=0$ in an ideal op-amp, so:

$i_{\text{1}}=i_{\text{F}}$

Furthermore, the capacitor has a voltage-current relationship governed by the equation:

$I_{\text{C}}=C{\frac {dV_{\text{c}}}{dt}}$

Substituting the appropriate variables:

${\frac {v_{\text{in}}-v_{\text{2}}}{R_{\text{1}}}}=C_{\text{F}}{\frac {d(v_{\text{2}}-v_{\text{o}})}{dt}}$

$v_{2}=v_{1}=0$ in an ideal op-amp, resulting in:

${\frac {v_{\text{in}}}{R_{\text{1}}}}=-C_{\text{F}}{\frac {dv_{\text{o}}}{dt}}$

Integrating both sides with respect to time:

$\int _{0}^{t}{\frac {v_{\text{in}}}{R_{\text{1}}}}\ dt\ =-\int _{0}^{t}C_{\text{F}}{\frac {dv_{\text{o}}}{dt}}\,dt$

If the initial value of v_o is assumed to be 0 V, this results in a DC error of:

$v_{\text{o}}=-{\frac {1}{R_{\text{1}}C_{\text{F}}}}\int _{0}^{t}v_{\text{in}}\,dt$

Practical circuit

The ideal integrator seen above is not a practical circuit design. Non-ideal op-amps have a finite open-loop gain, an input offset voltage and input bias currents ($I_{B}$ in the ideal circuit figure, above). This can cause several issues for the ideal design; most importantly, if $v_{\text{in}}=0$, both the output offset voltage and the input bias current $I_{B}$ can cause current to pass through the capacitor, causing the output voltage to drift over time until the op-amp saturates. Similarly, if $v_{\text{in}}$ were a signal centered about zero volts (i.e. without a DC component), no drift would be expected in an ideal circuit, but may occur in a real circuit.

In DC steady state, the capacitor acts as an open circuit. The DC gain of the ideal circuit is therefore infinite (or the open-loop gain of a non-ideal op-amp). A large resistor $R_{F}$ can be inserted in parallel with the feedback capacitor, as shown in the figure above. This limits the DC gain of the circuit to a finite value, and hence changes the output drift into a finite, preferably small, DC error:

$V_{\text{E}}=\left({\frac {R_{\text{f}}}{R_{1}}}+1\right)\left(V_{IOS}+I_{BI}\left(R_{\text{f}}\parallel R_{1}\right)\right)$

where $V_{IOS}$ is the input offset voltage and $I_{BI}$ is the input bias current on the inverting terminal. $R_{f}\parallel R_{1}$ indicates two resistance values in parallel.

To negate the effect of the input bias current, set $R_{\text{on}}=R_{1}||R_{f}||R_{L}$. The error voltage then becomes:

$V_{\text{E}}=\left({\frac {R_{\text{f}}}{R_{1}}}+1\right)V_{IOS}$

The input bias current causes the same voltage drops at both the positive and negative terminals.

Frequency response

The frequency responses of the practical and ideal integrator are shown in the above figure. For both circuits, the crossover frequency $f_{\text{b}}$, at which the gain is 0 dB, is given by:

$f_{\text{b}}={\frac {1}{{2\pi }{R_{\text{1}}}{C_{\text{F}}}}}$

The 3 dB cutoff frequency $f_{\text{a}}$ of the practical circuit is given by:

$f_{\text{a}}={\frac {1}{{2\pi }{R_{\text{F}}}{C_{\text{F}}}}}$

The practical integrator circuit is equivalent to an active first-order low-pass filter. The gain is relatively constant up to the cutoff frequency decreases by 20 dB per decade beyond it. The integration operation occurs for frequencies in the range $\left[f_{\text{a}},f_{\text{b}}\right]$, provided that $f_{\text{a}}<f_{\text{b}}$. This condition can be achieved by appropriate choice of $R_{\text{F}}C_{\text{F}}$ and $R_{1}C_{\text{F}}$ time constants.

Applications

The integrator is mostly used in analog computers, analog-to-digital converters and wave-shaping circuits.

References

• OP AMP Integrator Complete Tutorial

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